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DDR5: The next memory standard

Written By Rohan Johri
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Seven years ago, the world was introduced to the RAM standard of DDR4 but today the standard has been refreshed again to the bring us the latest DDR5 RAM standard.

DDR5 Memory Module

What is DDR?

Double Data Rate otherwise known as DDR is an advanced version of Synchronous Dynamic Random Access Memory, known as SDRAM. SDRAM is a RAM standard which works by waiting for clock signals then acts upon the inputs whereas DDR uses both the rising and falling edges of the clock signal to respond to inputs.

The difference between the two standards is in fact the way the clock signals are interpreted to transmit data. SDRAM transmits data once per clock cycle whereas DDR is able to transmit twice as much data on a single clock cycle, for the same frequency of the input signal.

DDR is used in computer hardware as a converter from Analogue to Digital signals and is often used with memory.

DDR5 and its previous generations

The first version of DDR to come out was named DDR. This DDR module used a 184 pin connector with a 64 bit wide Data Bus.

Following this came DDR2 which again uses the 64 bit wide Data Bus but has a total of 240 pins on its connector as a pose to 184 found on its predecessor.

DDR3 soon followed suit again with a 240 pin connector but with an increase in speed bringing better performance.

In 2014, the world was introduced to DDR4 and seven years later we have DDR5. With its 288 pins, DDR5 is the latest Memory standard.

What distinguishes each DDR standard from the others is the key which enables the memory module to slot into the memory slot and DDR5 is no exception. With a different key than DDR4, the generations are not backwards compatible, despite the same pin count.

Another difference that DDR5 has is that the Power Management Integrated Circuit, better known as PMIC, has been moved from the motherboard on previous generations to the memory module itself with DDR5.

The role of the PMIC is to convert the voltage delivered by the power supply which is 5 Volts to a lower voltage of 1.1 Volts which can safely be delivered to each of the DDR5 chips on the memory module.

This change of location of the PMIC from the motherboard to the memory module was vital in enabling higher data speeds than the previous generation as the distance the electrical signal has to travel is significantly reduced thus keeping the signal intact.

Another change that DDR5 brings is that each memory chip has got 8 bank groups versus 4 on the previous generation. This overcomes the bottleneck that DDR4 poses.

How this works is in the following way:

Each memory chip stores data as a 2D grid of bits, which is known as a “bank”. These “banks” are bundled together into “bank groups”. Whenever a “bank group” is accessed, it needs time to cool down before it can be re-accessed. Each “bank group” is accessed one after another and in DDR4 memory having four “bank groups”, means each group “breathes” for 3 cycles before it needs to be accessed again.

For higher speeds this causes problems of a “breathing” bank group not being able to cool down fully before being accessed and thus it causes errors. DDR5 resolves this by having 8 bank groups and thus offers plenty of time for each bank group to cool down before being accessed.

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Rohan Johri

I am a technology journalist who researches in multiple computer technologies and evaluates its real-world applications through implementation in consumer and industry leading products.

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